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[ The PC Guide | Introduction to the PC | PC Fundamentals | Signaling, Clocks and Synchronous Data Transfer ]

Derived System Clocks

The earliest PCs had just a single system clock; everything from the CPU and the memory to the system bus and peripherals ran at the same speed. Today, PC components are much more specialized, and some circuits and components operate much faster than others. For this reason, there is not just one system clock within the PC, but several. For example, a different system clock speed is typically used for the CPU, for the chipset and memory circuitry, and even for each of the various system buses.

One solution to providing different system clocks would be to incorporate multiple oscillator circuits into the PC. This is typically not done for a couple of reasons. First of all, it would be expensive. More importantly, however, the different clock signals would tend to get out of synchronization with each other. It is possible to synchronize different clock signals, but there's a different way to create multiple clock signals that is easier: using derived system clocks. These are clock signals that are created from other signals, using special circuits called frequency multipliers and frequency dividers. For example, a frequency multiplier could take a 100 MHz clock and create from it a 200 MHz clock signal or a 50 MHz signal.

The exact speed of the system clocks within a PC, and even the number of different clocks, varies from one system to another. Typically, the "main" system clock is the speed at which the chipset and other key motherboard circuits operate; other clocks are derived from it. The table below gives an example of how the system clocks are related in a typical system. In this case, for illustration purposes, I am showing the clocks for a Pentium III system, in this example a "Katmai" Pentium III running at 600 MHz on a 133 MHz system bus:

Device / Bus

Clock Speed (MHz)

Clock Derivation



System Bus * 4.5

Level 2 Cache


Processor / 2

System (Memory) Bus



AGP Video


System Bus / 2



System Bus / 4



PCI Bus / 4

Note that clock speeds can be multiply derived: speed C can be derived from speed B, which was in turn derived from speed A. Note also that the numbers shown are their "typical" rounded or truncated values, as commonly used in the industry; 133 is really 133.33, and 66 should really round to 67 (since it is 66.66 MHz).

Next: Synchronous (Clocked) Data Transfer

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