Studying for the A+, Network+ or Security+ exams? Get over 2,600 pages of FREE study guides at CertiGuide.com!|
Join the PC homebuilding revolution! Read the all-new, FREE 200-page online guide: How to Build Your Own PC!
NOTE: Using robot software to mass-download the site degrades the server and is prohibited. See here for more.
Find The PC Guide helpful? Please consider a donation to The PC Guide Tip Jar. Visa/MC/Paypal accepted.
|Take a virtual vacation any time at DesktopScenes.com - view my art photos online for FREE in either Flash or HTML!|
Dedicated "Backside" Cache Bus
Conventional processors use level 2 cache on the motherboard and connect to it using the standard memory bus arrangement. To achieve better performance, many newer processors use a dedicated high-speed bus to connect the processor to the level 2 cache. For example, the standard Pentium 200 runs on a 66 MHz system bus, and the system cache runs at this speed as well, but the Pentium Pro 200 has an integrated level 2 cache that runs at full processor speed--200 MHz.
A special backside bus manages this high-speed data link between the processor and the level 2 cache (which is entirely within the Pentium Pro package, since it contains both the processor and level 2 cache). The Pentium II processor has a compromise arrangement that is similar; it runs at half the processor speed, so a 266 MHz Pentium II runs its cache bus at 133 MHz (much slower than the Pentium Pro but much faster than the Pentium). Both of these buses are transactional (non-blocking) so they allow for concurrent requests to the system cache, greatly improving performance.
Another advantage of this design is that having separate caches and buses to run them is far superior for multiprocessing. Not only does each processor have its own cache without having to share a single one on the motherboard, each cache has an independent, non-interfering bus to service it.
Note: Intel calls the use of
a separate bus for the cache and memory Dual Independent Bus (DIB)