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Integrated vs. Separate Data and Instruction Caches
Most (all?) level 2 caches work on both data and processor instructions (code, programs). They don't differentiate between the two because they view both as just memory addresses. However, many processors use a split design for their level 1 cache. For example, the Intel "Classic" Pentium (P54C) processor uses an 8 KB cache for data, and a separate 8 KB cache for program instructions. This is more efficient due to the way the processor is designed, and doesn't really affect performance very much compared to a single 16 KB cache, though it might lead to a very slightly lower hit ratio. Each of these caches can have different characteristics. For example they can use different mapping techniques (as they do on the Pentium Pro).
Next: Mapping Technique