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Since each cache line (or set) in the data store is shared by a large number of memory addresses that map to it, we need to keep track of which one is using each cache line at a given time. This is what the tag RAM is used for.
Let's take a look at the same example again: a system with 64 MB of main memory, a 512 KB cache, and 32-byte cache lines. There are 16,384 cache lines, and therefore 4,096 different memory locations that share each line. However, recall that each line contains 32 bytes; that means 32 different bytes can be placed in each line without interfering with each other. So really, there are 128 (4,096 divided by 32) different 32-byte lines of memory that must share a cache spot.
Okay, now to address 64 MB of memory you need 26 address lines (because 2^26 is 64 M) which are numbered from A0 to A25. 512 KB only requires 19 lines, A0 to A18. The difference between these is 7 lines; not surprisingly, since 128 is 2^7. These 7 address lines are what tell you which of the 128 different address lines that can use a given cache line, are actually using it at the moment. That's what the tag RAM is for. There will be as many entries in the tag RAM as there are in the data store, so we will have 16,384 tag RAM lines, although of course these entries are only a few bits wide, not 32 bytes wide like the data store.
Notice that the tag RAM is used early in the process of determining whether or not we have a cache hit. This means that no matter how fast the cache data store is, the tag RAM must be slightly faster.