Learn about the technologies behind the Internet with The TCP/IP Guide!
NOTE: Using robot software to mass-download the site degrades the server and is prohibited. See here for more.
Find The PC Guide helpful? Please consider a donation to The PC Guide Tip Jar. Visa/MC/Paypal accepted.
View over 750 of my fine art photos any time for free at DesktopScenes.com!

[ The PC Guide | Systems and Components Reference Guide | System Memory | Memory Speed, Access and Timing ]

System Timing and Wait States

The true speed that the memory subsystem runs at is referred to as the system timing. The timing that the system uses to control access to the memory is specified usually using a number of settings in the BIOS setup program, though some newer systems automatically determine timing by looking at the memory supplied to it.

System timing is normally specified as the number of clock cycles required to do a read or write to memory. The fewer clock cycles required, the faster the memory runs. If the timing is set too low (also called setting overly aggressive timing) then memory errors or corruption can result. The maximum speed that the system timing can be set to depends on the following factors:

  • DRAM Speed: Faster physical memory lets the timing be set more aggressively.
  • DRAM Technology: Some types of memory allow faster access than others. For example, EDO memory is faster than FPM.
  • Chipset Speed: Some chipsets allow faster timing than others due to better design or more performance-enhancing internal features.
  • Memory System Quality: High quality motherboards, chipsets and memory allow the use of faster timing. Poor-quality components often act "flaky" under tight timing settings and it becomes necessary to reduce the timing level so the machine will run reliably.

The timing setting is also sometimes specified through the use of wait states. A wait state is a setting that refers to how many clock cycles must be inserted into the memory access process to wait for the memory. This number is basically the same as specifying the total number of clock cycles needed for the access, except that it is one lower because it represents extra clock cycles. In other words, zero wait states represents the fastest memory access you can have, which still must take one cycle. So, memory that takes three clock cycles is said to have two wait states.

Next: Memory Speed and the System Cache

Home  -  Search  -  Topics  -  Up

The PC Guide (http://www.PCGuide.com)
Site Version: 2.2.0 - Version Date: April 17, 2001
Copyright 1997-2004 Charles M. Kozierok. All Rights Reserved.

Not responsible for any loss resulting from the use of this site.
Please read the Site Guide before using this material.
Custom Search