Hello - I'm a bit new to building a computer and am certainly confused about bus speeds and hope someone can point me in the right direction.

New build with MSI KT6V LSR MS-7201 Mainboard that has 512 PC333 DDR and an AMD Sempron 2300+ CPU.

All is basically OK except that the WinXP-SP2 Home System Reports (by RClicking MyComputer and in Belarc and SiSoftSandra) the CPU speed as 950MHz which cannot be correct.

The CPU's own specifications state that its FSB is 333. The BIOS can set the bus speed in the range 100 to 280 and was set at the default value of 100 (and the cpu ratio which has a range of x6 to x15 was set as auto). I upped the bus speed to 200 but then the CPU speed was reported as 1900MHz and the Sempron as a 2600+ model. Also, SiSoft had a warning about overclocking.

So I then set the speed to 166 in the BIOS and at that value the various auditing softwares report the CPU frequency correctly (a Sempron 2300+ running at 1.58GHz) so I guess 166 is the correct setting.

Can anyone tell me why the BIOS setting of 166 (which is half the value of the CPU's own specification) would be correct and that the BIOS cannot set a value of 333 (even though it supports CPU's with speeds in excess of 3GHz. I thought that the with the ratio being set automatically the BIOS would simply sort out the correct multiplier but I guess that was too simplistic.

I seem to have got to the right settings by trial and error but would like to understand the settings for the future. Also can underclocking ever be harmful. TIA from Annie.

Can anyone tell me why the BIOS setting of 166 (which is half the value of the CPU's own specification) would be correct
Because work is done on the "up" side of the current and on the "down" side of the current. I think. Wait for further explanation to be sure...

Also can underclocking ever be harmful.
Yes, that's why we don't condone a lot of overclocking advice here. When overclocking, you're operating your equipment outside of the specifications set by the manufacturer. Damage can be done because of excessive heat and because of abnormal voltages. Also, even if no permanent damage is done, the likelihood of system instability increases. Responsible overclocking done by someone who understands the equipment's limits can squeeze some extra performance out of your system, but there's almost always some risk involved.

Yes, but the question was about "underclocking." I myself don't have any answer to that, so perhaps one of the senior Geeks here would. :)

Oops. I saw "-erclocking" and my brain made the rest what I wanted to see...

No, there's no danger in underclocking your CPU or RAM.

Thanks for you inputs so far - though I'm no clearer as to how to decide what bus speed to set in the future if the value could be one of two values - one of them being double that of the other.

Danger of underclocking might have been a bit strong - but I wondered if system stability could be affected rater dan damage to hardware components that is.

Thanks - Annie.

512 PC333 DDRThe technical forms of naming for DDR are different from regular SDRAM. The form of the name that starts with "PC" should have the bandwidth number, in MB/s, after it - as in PC2700 (capable of 2700MB/s). The form of the name that starts with "DDR" should have the effective DDR bus speed number, in MHz, after it - as in DDR333 (effective bus speed of 333MHz).

The FSB answer gets even more complicated...

The Socket A Sempron's are based on the AthlonXP's, using AMD's K7 core architecture. They use a traditional FSB where the memory controller gives the CPU its base clock speed. FSB stands for "front side bus" and is the connection between the CPU and the memory controller (usually residing in the Northbridge part of the chipset, as is the case with your new system). The actual FSB clock speed of your Sempron 2300+ (based on the Thoroughbred B core revision) is 166MHz. But the FSB has DDR technology applied to it. This means that the speed of the FSB is effectively doubled to 333MHz because the bus transmits data on both the rising and falling edges of the clock cycle (if you know a bit of Physics, the two signals are out-of-phase from eachother by 180 degrees with the first one being in-phase with the initial clock cycle provided by the clock generator). So the base speed of 166MHz for the FSB doesn't change - but the implementation of the bus effectively doubles it to 333MHz. However, because actual speeds are always reported by the BIOS, it shows up in the BIOS settings as 166MHz. The range you gave for the FSB speed in the BIOS settings of 100-280MHz is actually doubled (using DDR) to the normal reported FSB speeds of 200-560MHz. By setting the FSB speed in the BIOS to 200MHz, you were running your CPU's FSB at 400MHz, which resulted in a nice 20% overclock.

If you think this is confusing, check out the P4! It has a quad-pumped FSB, so even though you'll see P4's reporting an FSB speed of 800MHz, it actually shows up in the BIOS settings as 200MHz. Or, for even more fun, check out AMD's CPU's based on their new K8 core architecture, which features a built-in memory controller! What's the FSB speed for those? Core speed. Oftentimes reported simply as "built-in" (actually there is no FSB because the memory controller is already part of the CPU). You have no idea how many confused souls have been pouring in lately looking for answers to that one!

The way most CPU's get their speed is by multiplying the actual speed of the FSB (without any DDR or quad-pumping, etc) by the CPU's own clock multiplier. In this way, you get your speed. In the case of your Sempron 2300+, the actual FSB speed is 166MHz (actually it's 500/3 MHz so 166.6666 repeating) and the CPU's clock multiplier is 9.5x, so 166.66 (etc) multiplied by 9.5 = 1583.33 (etc) MHz. You see, the bus may have DDR applied to it, but this doesn't change the actual speed value that the CPU reads from the FSB clock signal given to it by the memory controller, so no doubling of the FSB can affect the CPU's speed. However, by increasing the speed of the FSB (like you did in the BIOS by going straight to 200MHz) will give the CPU a faster clock signal and therefore increase the speed of the CPU. When you gave your Sempron 2300+ a nice 20% boost to 2600+ speeds, you were running it at 1900MHz.

To answer your other question about underclocking, no there's no physical harm you can do to your hardware by underclocking. Furthermore, there's no stability issues with underclocking. But if you do ever underclock, think also about reducing the CPU's core voltage. By UC'ing without reducing the core voltage, you will be bringing down the CPU's speed, but the idle temp will remain the same - only the max temp will lower than normal. By UC'ing and reducing the core voltage (if possible, not all mobo's can go lower) you will also reduce the idle temp. The reasonings behind this are complex, but I will explain them to you if you so desire.

Ok, any other questions?

Yeah, I have one for ya.

If I change the memory timing setting in the BIOS setup to SPD from Auto, this is a change then from 166 to 200. The FSB, however, is set at 166 mhz. with the DDR at 333. Now if I change the memory setting then BACK to the suggested Auto setting(which is the "suggested" BIOS setting in fact), the boot up time is slower.

I'm assuming there's no problem with my SPD setting since I haven't encountered any instability but I will if I up the cpu/memory controller FSB as I already have experienced before(overclocking, I know).

I'll need to know your chipset, what type/speed of RAM you have, and the memory timings that show up in the BIOS when SPD and Auto are chosen. Off-hand, I'd say you have DDR400 (PC3200) RAM and the Auto setting in the BIOS runs the RAM according to the lowest common denominator from both RAM speed and CPU FSB speed.

When it comes to RAM, I always configure my own timings because that's usually the best way to do it. However, not everyone can do this because most users don't even know what kind of RAM they have, much less what its timings are supposed to be. If you know your RAM's type/speed and the manufacturer's listed timings at that speed, then you can also configure your own RAM timings in the BIOS.

The SPD timings shown in the BIOS are either 166 or 200.

And the other info you asked for:

1)Its an nForce 2 chipset.

2)Sisoft Sandra indicates that the FSB = 2X167 mhz(334 mhz data rate) and also says the memory bus speed is 2X200(400 mhz data rate).

So apparently by setting the memory timing for 200 I have then created that memory speed figure which as you'll notice is higher than the FSB rate.

But what are your RAM timings, as in latencies? You know - CAS, RAS, RP, CT, etc? Also, is your RAM actually DDR400? I assume so since that speed showed up under SPD, and the system is stable under DDR400 speed. If it were DDR333, it likely wouldn't have even posted if the BIOS set the RAM speed to DDR400 (even with really really loose latencies).

The NForce2's memory controller is legendary in its performance, even with out-of-sync FSB:RAM ratios. It is quite possible that you are seeing a slight performance boost by running your RAM faster than the FSB. This is worthy of noting right now: you don't have to run the RAM and FSB at the same speed. Many people think you do, but you don't. While you won't always see a performance boost by running your RAM faster than the FSB, it never hurts, either. The real hurt is when you run your RAM slower than the FSB. Performance will go down! That's not to say it won't perform just fine for ordinary tasks, but performance optimization is desireable for a gaming platform.

Another interesting aspect of the NForce2's memory controller is that it's capable of fake dual-channel mode. That is to say, it's not technically a 128-bit wide memory controller (which is necessary for true dual-channel mode) but rather it's an oscillating 64-bit wide memory controller. It fakes dual-channel mode by quickly switching between the two "channels". The main reason this had to be done is because AMD's Socket A CPU's are incapable of supporting any more RAM bandwidth - they are stuck at a max of 3.2GB/s (for those with the 400FSB) so they see very little extra RAM bandwidth performance in dual-channel mode (which can deliver a max of 6.4GB/s). The P4's, on the other hand, can take up to 6.4GB/s of RAM bandwidth (for those with the 800FSB) and so are a prime candidate for taking full advantage of dual-channel mode. AMD's newest Socket 939/940 CPU's based on the K8 architecture have a built-in 128-bit wide memory controller, and so are also able to take full advantage of dual-channel mode (at 6.4GB/s). AMD's Socket 754 CPU's have a built-in 64-bit wide memory controller, so they still have single-channel mode (3.2GB/s) but RAM bandwidth does get an extra boost from having a built-in memory controller in the first place so they can still keep up with the big boys (L1-to-RAM latencies for 754 CPU's are 1/3 that of the P4's).

Keep the questions coming...

Wow, a veritable wealth of technospeak dispensed here.....

Anyway, those other figures you asked about.

1)the SDRAM active precharge delay--8

2)The SDRAM RAS to CAS delay--3

3)The SDRAM RAS precharge delay--3

4)The SDRAM CAS latency--2.5

Somehow I had been under the impression that the DDR was 333 but apparently that's not the case because as you say the SPD assigns a speed of DDR400. But when set to "auto" it then "reverts" to 166 which would correspond to the FSB. So is the RAM speed definitely the DDR400/PC 3200?


What does SPD stand for BTW?

Thanks for the help.

Phew !!! Cool - such an amazing amount of information.

I would like to summarise what I have understood from all of that in my own words and I can then be corrected if I have got anything wrong.

There is a bus ("micro-wiring") between the Northbridge Memory Controller and the CPU and this is the FSB. Signals are sent like a sine wave along this bus at a frequency determined by a clock somewhere (where?) on the motherboard. Because "The FSB has DDR technology applied to it" (sic) a binary number can somehow be sent between the memory controller on both the rising and falling edge of this sine wave. This effectively doubles the frequency of the mainboard clock.

So if I have understood that much correctly then when a CPU's specification states that it has a FSB of x this means that it needs to be connected to the Memory Controller at a frequency of x/2 if "DDR technology" is being applied to it or at x in the absence of "DDR techonology". Well at least to be connected at that speed if normo-clocking is to take place. So as well as knowing the mainboard's clock speed one also needs to know the technology being used by the memory controller on the chipset. But where does one get this last piece of information from - or is it just assumed that a geekess would simply know this.

I have presumed you said "DDR technology" meaning a type of technology and not the sort of physical RAM that is on the mainboard. I say this because I think I have seen mainboards onto which both single and double rate modules can both be used or in other words the type of RAM doesnt affect the actual speed of the FSB but DDR RAM would be able to communicate twice as fast with the chipset or the CPU.

I love physics but don't really understand how the data is communicated on either a full or a half of a sine wave; that is if a sine wave is the right way of describing things. The bus presumably has a certain width comprised of a number of micro-wires; 8 such micro wires would thus represent the capability of sending two bytes of information for each clock cycle or pulse. What I don't understand is how that data is communicated on "a wave" unless each wave is either in phase or out of phase or else can have a variabe amplitude. Or is wave a misnomer and there are actually pulses of current sent instead?

I'm really glad that I hopefully already understand things much better and am delighted to find such amazing help and expertise here.

Thanks again from Annie.

What does SPD stand for BTW?This is the central reason you're seeing the results that you are seeing. SPD stands for "serial presence detect" - which is a signal that the RAM module itself gives to the chipset to identify its standard speed. First implemented in SDRAM, it quickly became apparent that some... modification... was necessary for next time around (DDR SDRAM uses SPD better, which I will explain). SPD tells the memory controller what the rated speed of the RAM module is supposed to be, such as PC100 or PC2700 or whatever. In SDRAM, this SPD signal was taken as absolute truth by the memory controller and so SDRAM was run at that speed when the BIOS setting for RAM was set to "auto-detect". However, this caused havoc with a number of systems that, say, were only designed to use PC66 & PC100, but were given a PC133 module. SDRAM can technically be set to run at slower speeds (full backwards compatibility) but many OEM systems had no other choice in their BIOS settings to change the speed from 133 down to 100. This resulted in trying to use RAM that should have worked just fine, but didn't because the #$(* OEM's inadvertently locked out support for higher speed SDRAM. As such, SPD was a good idea, but wasn't quite used the way it was meant to be used.

Enter DDR SDRAM, the next revision...

With DDR RAM, the JEDEC committee (they are the ones responsible for establishing world-wide standards for RAM and other related technologies) decided to modify the use of SPD. It still gives the memory controller a rated speed for the RAM module, but the memory controller can now override that speed to a lower one (DDR is backwards compatible, too) if the chipset or configuration requires a lower speed. This provides the ultimate in automatic backwards compatibility! :cool:

What this means to you is that choosing "by SPD" in your BIOS settings gives you two speeds: one to run in-sync with the FSB speed, and one for the actual rated speed of the module(s). You can pick either one, but like I said before the NForce2's memory controller is very good so you will see (and have been seeing) a nice performance boost by choosing the higher speed. Even though this is out-of-sync from the FSB, the memory controller is able to compensate for this and the result is reduced RAM latencies as seen by the CPU/FSB. For your timings, if you are getting 2.5-3-3-8 at DDR400 speeds, then by all means use that setting! It can only help in your situation.

Or is wave a misnomer and there are actually pulses of current sent instead?My congrats on your quick understanding of the concepts that I have, more or less, presented in a highly technical fashion! I do have to... umm... "adjust" :p your views on this point, however. To put this in absolute perspective, DC current is used for computing. Digital content requires that DC be used and not AC. AC would just really really screw up the whole system clock thing!

Ok, starting from the beginning. There exists somewhere on every mobo a tiny Quartz (usually Quartz) crystal contained in a metal cylinder. This is affectionately called a "tin can" in computer electrical engineering. This crystal, along with a few well-placed capacitors, has DC electricity running through it and performs the function of a "scarab" by pulsing every now and then. Because the crystal is a solid object of very precise and accurate shape, the timing of these pulses is very regular. Yes, there's essentially the inner workings of a common digital wrist watch on your mobo! This is the "system clock" - the source of all concept of time for your system. Every other bus and chip and frequency in your system is based off of this.

Now the system clock is directly connected to the memory controller (in simple terms) which controls not only the flow of data between the CPU and RAM, but also sets the time for the whole chipset, and therefore the whole system. In the case of AMD's K8 CPU's with a built-in memory controller, the system clock is directly connected to the CPU as a whole, so the CPU actually controls the time for the whole system (but that's another article in itself!). The concept of "time" is transmitted to all controlling chips (CPU, Northbridge, Southbridge, etc) on a separate set of traces (ie "micro-wiring") and so doesn't travel across (nor interferes with) any bus whatsoever. So the memory controller gives a clock timing to the CPU independent of the FSB traces. The speed of the clock and the FSB are linked, but the traces themselves do not touch eachother. So the FSB is free to perform any type of clock multiplying (DDR, quad-pumped, etc) without affecting the raw clock time that the CPU receives.

Getting back to the DC current idea, the data is actually transmitted as pulses of voltage (higher voltage is "1", lower or no voltage is "0") according to the bus speed. So clock multiplying techniques merely split the individual clock cycles into pieces. The multiple signals are out-of-phase with eachother from a clock cycle standpoint, not from a sine wave standpoint (I appologize for the previous confusion).

So as well as knowing the mainboard's clock speed one also needs to know the technology being used by the memory controller on the chipset. But where does one get this last piece of information from - or is it just assumed that a geekess would simply know this.Well, CPU's are released in groups. Families, if you will. It's not like each CPU operates on a completely different platform than all the others. Moreover, there are multiple "core revisions" of each family of CPU, and usually more than one family per "microarchitecture". Understanding how these all work is a full-time job! I know, I'm doing it! Check out the website (www.sheaiden.com/) that my friend and I have. Just click on the link for Athlon64's and look yours up! (Yeah, I know, we'll be adding the Sempron name to the link title at the next update.) I'm currently working on updates for the CPU portions (the Pentium D is out!) as well as articles about these very subjects that I've answered here, but the Socket A Sempron info is finished for your specific version. If you have any further questions about the site info, just let me know.

To fill in the blanks about the RAM aspect, yes there are many types. SDRAM operates at normal non-clock multiplied speeds. So PC100 SDRAM operates at 100MHz. DDR SDRAM doubles its frequency, so DDR400 only operates at a raw speed of 200MHz. Memory controllers can be designed to function with more than one type of RAM (you mentioned SDRAM & DDR, which is common for older Socket A mobo's) but only one type can be used at once. Ie, you can use either SDRAM or DDR, but not both at once. Of course, SDRAM has a lower overall bandwidth than DDR, so the total FSB bandwidth won't be filled when using SDRAM (I can go into more details on this if you want) but the system will nevertheless function just fine. It's all very much like connecting water hoses of different widths. If you have a thinner one in there somewhere, water will still flow through the hoses, but not as fast as if you use hoses of all the same widths (or wider for faster RAM). Dual-channel memory is like adding another hose on top of that, so you get twice as much raw RAM bandwidth going to the CPU (but not all CPU's & chipsets are able to use dual-channel mode).

Any more questions?

[QUOTE=




What this means to you is that choosing "by SPD" in your BIOS settings gives you two speeds: one to run in-sync with the FSB speed, and one for the actual rated speed of the module(s).



QUOTE]

The "'Auto" setting for the memory timing results in the RAM setting in-sync with the FSB speed. You're then saying the SPD could do the same because of the "backward compatibility" feature?

Interestingly. on my "dinosaur" PC(which has SDRAM at PC133), the SPD option was enabled and the first two times I booted up got the same BSOD so I then went and changed the setting to disable. This changed the RAM designation on the first screen of the BIOS to PC100. Thereupon, I then again changed the setting back to enabled and no BSOD this time. So I assume that as with my other example cited above(with the DDR RAM)that I have an FSB lower than the RAM speed(in this case the FSB is 100) so long as I have the SPD enabled.

The "'Auto" setting for the memory timing results in the RAM setting in-sync with the FSB speed. You're then saying the SPD could do the same because of the "backward compatibility" feature?Sort of... it's the result of the SPD signal from the RAM module(s) and the chipset's ability to override that signal to a lower speed. That's where you get the choice of setting the RAM speed to 166 (in-sync with your FSB). The NForce2 chipset can also handle DDR RAM speeds up to 200, and is capable of running the RAM out-of-sync with the FSB, so it can use the straight-up SPD signal, also. That's where you get the choice of setting the RAM speed to 200. Basically, the way SPD is implemented with DDR & DDR2 is that the module can give a guideline for how fast it wants to run, but the chipset has ultimate authority over how fast it actually runs.

The weird issue you had with your "dinosaur" PC with SDRAM is a prime example of how SPD's initial usage on SDRAM failed miserably. Like I said, it was a good idea, but it needed some refinement in execution. The virtual ability of DDR & DDR2 to be PnP (plug-'n-play) across all supported platforms is a testament to the success of the modified usage of SPD.

Sorry Da for messing with your PC and sorry Saphalline for not getting back earlier.

Thanks again for an additional wealth of info. A lot of things are much clearer in my own mind now and straightforward DC is much easier to comprehend than waves of electromagnetic radiation. Without getting into circuit diagrams, is there an easy, or qualitative, explanstion of how these "pulses of DC" are generated?

I presume that there is a DC source somewhere and a switch linked to the "clock/memory controller" that chops it up into fragments perhaps analagous to the way an electric bell works. But what would be fascinating to understand is how the data streams are converted into pulses of variable voltage. I can sort of see how a transistor could be used to vary the flow along a "micro wire" but its harder to see just how its bit stream trigges the "valvular effect" of a transistor. That's my best guess at what might be happening and if you have the time and inclination any further insight would be much appreciated.

Thanks
AGAIN (LOL) :D
from Annie.

Oh boy... I don't think there's a way to get any deeper without using circuit diagrams and electrical engineering topics. Motherboards (mobo's for short) are called that for a reason! They're probably the biggest and most complex IC in the consumer electronics industry. So big and complex, in fact, that their very design requires huge computers programmed with all sorts of electromagnetic field laws (including a bit of quantum mechanics) to help lay them out. Mobo's usually have 4-6 layers of "micro wires" and components layed out specifically to facilitate the all the busses and combat electrical, magnetic, and radio noise. Not to mention that dealing with "the clock" is a real problem (electrical pulses must be timed with extreme care), which is why clock-less chips and systems are starting to become a popular idea. Add to that the fact that all the noise generated by the circuits must adhere to all the FCC, CE, etc, laws that are in place around the world, not to mention all the add-in cards (PCI, AGP, PCIe, PCI-X, etc).

Needless to say, digging any further would uncover another entire level (or two) of hardcore understanding! I recently met a very smart and insightful man named Mick Bauer (author of the "Paranoid Penguin" collumn of Linux Journal) who said very succinctly that "hardware is a black hole". ;) If you have any sense of self-preservation, you'll take what you've learned so far and...

TURN BACK!!

Don't go any further, or you'll end up like me! That's not inherently a bad thing, but my unquenchable thirst for hardware knowledge has led me down a path that I'm not sure I would take again. I understand far too much about hardware for someone who has no intention of going into that profession! I'm in a very unusual situation, and just in case you don't care to go that route, I'm warning you now before you ask any more questions...