iced
06-17-2004, 02:38 PM
A basic microprocessor system uses 15 address lines (A 15, AO) and various
Control signals to access memory locations and I/O ports. A control signal IO/M Select I/O chips when at logic 1 (5V) and memory chips when at logic 0 (0V).
The i/0 interface chips and memory chips normally have more than one chip select Inputs.
The actual memory locations or ports inside the chips are accessed by the
Address Lines:
One address line can select up to two memory locations
Two address lines can select up to four memory locations
Three address lines can select up to eight memories
Ten address lines can select up to 1024 memory locations.
In computer jargon 1024 is referred to as 1 K.
How many address lines are necessary to address 4K of memory?
Since 4K = 4 * 1024 = 4096. And since 2 = 4096, then 12 Lines are needed to
Address 4096 memory locations (A11 to AO).
Similarity 16 address lines (A15 to AO) would be required to access 64K of memory,
Since 64K •-= 65536...
8K of memory is implemented using two 4K memory chips.
To address 4K of memory, 12 address lines would be required and these are Connected directly to both chips. To address 8K of memory an additional address Line is required which is used to select between the two 4K chips by means of a Decoder.
When A12 = 0, RAM 0 is selected when A12 = 1 RAM 1 is selected.
The IO/M line must be low before the memory location selected by the address lines will be accessed.
If the IO/M line is high, then one of the four ports in the IO chip will be selected Depending on the value contained on the AO and A1 lines.
The address range for RAM 0 is- -
0000 0000 0000 0000
0000 1111 1111 1111
That is in Hexadecimal OOOOH to OFFFH
the address range for RAM 1 is: -
0001 OOOO OOOO OOOO to
0001 1111 1111 1111
That is in Hexadecimal 1000H to IFFFH
Now answer the following questions on the implementation of memory in a computer system:
(a; How many address lines are necessary to access 64K of memory?
(b) How many address lines are necessary to access 4K of memory and which Address lines are normally used for this purpose?
(C) How many 4k .memory chips are required to implement 64k of memory?
(d) How many chip select signals will be required from the decoder in (c} above?
(e) What address lines would be used at the inputs to the decoder?
(f) Describe under what conditions the ports will be selected.
If you can help me with the answers for A to F it will be appreciated, i think the answer to A is sixteen and i think the answer to B is twelve (A11 to A0) i also have a diagram which came with it. Thankyou for spending the time to look at my problem it is greatly appreciated hope you can help.
Control signals to access memory locations and I/O ports. A control signal IO/M Select I/O chips when at logic 1 (5V) and memory chips when at logic 0 (0V).
The i/0 interface chips and memory chips normally have more than one chip select Inputs.
The actual memory locations or ports inside the chips are accessed by the
Address Lines:
One address line can select up to two memory locations
Two address lines can select up to four memory locations
Three address lines can select up to eight memories
Ten address lines can select up to 1024 memory locations.
In computer jargon 1024 is referred to as 1 K.
How many address lines are necessary to address 4K of memory?
Since 4K = 4 * 1024 = 4096. And since 2 = 4096, then 12 Lines are needed to
Address 4096 memory locations (A11 to AO).
Similarity 16 address lines (A15 to AO) would be required to access 64K of memory,
Since 64K •-= 65536...
8K of memory is implemented using two 4K memory chips.
To address 4K of memory, 12 address lines would be required and these are Connected directly to both chips. To address 8K of memory an additional address Line is required which is used to select between the two 4K chips by means of a Decoder.
When A12 = 0, RAM 0 is selected when A12 = 1 RAM 1 is selected.
The IO/M line must be low before the memory location selected by the address lines will be accessed.
If the IO/M line is high, then one of the four ports in the IO chip will be selected Depending on the value contained on the AO and A1 lines.
The address range for RAM 0 is- -
0000 0000 0000 0000
0000 1111 1111 1111
That is in Hexadecimal OOOOH to OFFFH
the address range for RAM 1 is: -
0001 OOOO OOOO OOOO to
0001 1111 1111 1111
That is in Hexadecimal 1000H to IFFFH
Now answer the following questions on the implementation of memory in a computer system:
(a; How many address lines are necessary to access 64K of memory?
(b) How many address lines are necessary to access 4K of memory and which Address lines are normally used for this purpose?
(C) How many 4k .memory chips are required to implement 64k of memory?
(d) How many chip select signals will be required from the decoder in (c} above?
(e) What address lines would be used at the inputs to the decoder?
(f) Describe under what conditions the ports will be selected.
If you can help me with the answers for A to F it will be appreciated, i think the answer to A is sixteen and i think the answer to B is twelve (A11 to A0) i also have a diagram which came with it. Thankyou for spending the time to look at my problem it is greatly appreciated hope you can help.