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Nee help with this...
Consider a 32-bit CPU, with a 16-bit external data bus, driven by an 8-MHz input clock. Assume the CPU has a bus cycle whose minimum duration equals four input clock cycles. What is the maximum data transfer rate that this CPU can sustain?
Thanks for any comments.
bassman
03-19-2002, 09:36 AM
Hello Noob and welcome to the PC Guide forums.
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I would start with rereading the chapter you are studying (funny thing about tests and homework, they always deal with the material you are studying).
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I've read and reread the chapter.. but still can't figure it out . Why do they use the words "bus cycle minimum duration"? Isn't the length of every CPU bus cycle the same?. And is it the external data bus og the CPU bus that is driven by the 8-Mhz input clock, the CPU bus should be faster than the databus? If the CPU bus cycle is four input clock cycles, then the CPU works at 8/4 Mhz = 2 Mhz. For every CPU bus cycle it can transmit 16 bits of data to the external bus, which is (2*10^6)*16 bits/s. That is about 4Mb/s.... that surly can't be correct?. (Sorry for my bad english, I'm norvegian http://www.PCGuide.com/ubb/smile.gif)
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