"wait-states" arent intorduced : ram - processor?

[rahulkothari]

why aren't "wait-states" introduced in cpu while communicating with RAM bcoz ....
speed of ram = 100-133 mhz (sdram)
speed of processor = 500 mhz (p3)

or is it while transferring data to-and-from ram, data transmits at speeds of 100-133 mhz and processor speed isnt utilised fully ?

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An eye for an eye makes the whole world blind.
-Mahatma Gandhi

[rond36]

From The PC Guide:
Processor and Memory Buses

The processor bus is the set of wires used to carry information to and from the processor. This activity is normally controlled by the system chipset. The memory bus connects the processor bus to the system memory and cache; in practice, the processor and memory buses can be thought of as the same thing. Most people just refer to the memory bus, which is what I will do here.

The memory bus is the main data "thoroughfare" at the system level on the PC. All transfers of data to and from the processor go over this bus.

When the "system clock" is referred to generically, it normally refers to the speed of the memory bus running on the motherboard (and not usually that of the processor).

The entire system is tied to the speed of the system clock. This is why increasing the system clock speed is usually more important than increasing the raw processor speed; the processor spends a great deal of time waiting on information from much slower devices, especially the system buses. While a faster processor will have greater performance, this increase in speed will not lead to nearly as much performance improvement if the processor is spending a great deal of time sitting idle waiting for other, slower parts of the system.

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[This message has been edited by rond36 (edited 03-26-2002).]

[rahulkothari]

thx but i already read quite a few pages on pcguide.com regarding wait-states , processor-mem bottleneck and many others but didnt find the ans to my question.


the processor spends a great deal of time waiting on information from much slower devices, especially the system buses.


so that means processorhas to introduce wait-states while comm with RAM.

actually v have 8088 in our syllabus and there its mentioned dat the processor doesnt have to introduce any waitstates(v dont have these things in detail ... just trying to satiate my curious mind). i think i read somewhere that older processors were slow (8088 - max 10 mhz) and hence there was no need to introduce waitstates as the speed of memory was also almost equal to the processor....
.... while present day processors' speed is very high and speed of mem is around 100-133mhz. so wait-states have to b introduced in present day processors , right ?

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An eye for an eye makes the whole world blind.
-Mahatma Gandhi

[Ghost_Hacker]

..so wait-states have to b introduced in present day processors , right ?..


Pipelining ,cache memory and memory interleaving (this last depends on the type of memory used and motherboard support) can be used to run at "zero wait state" most of the time.