Studying for the A+, Network+ or Security+ exams? Get over 2,600 pages of FREE study guides at CertiGuide.com!|
Join the PC homebuilding revolution! Read the all-new, FREE 200-page online guide: How to Build Your Own PC!
NOTE: Using robot software to mass-download the site degrades the server and is prohibited. See here for more.
Find The PC Guide helpful? Please consider a donation to The PC Guide Tip Jar. Visa/MC/Paypal accepted.
|Take a virtual vacation any time at DesktopScenes.com - view my art photos online for FREE in either Flash or HTML!|
On the higher-bandwidth buses, a great deal of information is flowing through the channel every second. Normally, the processor is required to control the transfer of this information. In essence, the processor is a "middleman", and as with many similar cases in the real world, it is far more efficient to "cut out" the middleman and perform the transfer directly. This is done by having capable devices take control of the bus and do the work themselves; devices that can do this are called bus masters. In theory, the processor can do other work simultaneously; in practice there are several complicating factors. In order to do bus mastering properly, a facility to arbitrate between requests to "take over the bus" must exist; this is provided by the chipset. Bus mastering is also called "first party" DMA since the work is controlled by the device doing the transfer.
Currently most bus mastering in the PC world is done on the PCI bus; in addition, support has been added for IDE/ATA hard disk drives to do bus mastering on PCI under certain conditions. IDE hard disk bus mastering on PCI is discussed in more detail here, as well as in the section on PCI. DMA and bus mastering are discussed more generally in the section on DMA.
Next: The Local Bus Concept