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Standard DMA transfers are managed by the DMA controller, built into the system chipset on modern PCs. The original PC and XT had one of these controllers and supported 4 DMA channels, 0 to 3.
Starting with the IBM AT, a second DMA controller was added. Much in the way that the second interrupt controller was cascaded with the first, the first DMA controller is cascaded to the second. The difference is that with IRQs, the second controller is cascaded to the first, but with DMAs the first is cascaded to the second. As a result, there are 8 DMAs, from 0 to 7, but DMA 4 is not usable. There is no rerouting as with IRQ2 and IRQ9 here, because all of the original DMAs (0 to 3) are still usable directly.